ASIC Engineer – SoC/IP Verification

ASIC Engineer – SoC/IP Verification

Location: Hyderabad / Bangalore

Experience: 6+ Years

Employment Type: Full-Time

Job Overview

We are looking for an experienced ASIC Engineer 4 with strong hands-on expertise in SoC/IP Verification, SystemVerilog, UVM, PCIe, DDR, MBIST, Test Controller, and DFT Architecture.

The candidate will be responsible for developing and executing verification strategies for complex SoC/IP designs, debugging functional and DFT-related issues, and contributing to verification closure.

Mandatory Skills

• 6+ years of relevant ASIC / SoC / IP Verification experience

• Strong hands-on experience with SystemVerilog and UVM

• Experience developing and debugging reusable UVM verification environments

• Strong experience with PCIe and/or DDR verification

• Experience with Test Controller, MBIST, and DFT Architecture

• Strong knowledge of functional verification, assertions, coverage, and regression

• Experience in simulation debugging and coverage closure

• Proficiency in Python, Perl, and/or TCL for automation

• Exposure to AI-assisted verification tools and methodologies

Key Responsibilities

• Develop and maintain SystemVerilog/UVM-based verification environments

• Verify complex SoC/IP/subsystem designs

• Develop tests, sequences, monitors, scoreboards, assertions, and coverage models

• Perform PCIe and DDR protocol verification

• Validate MBIST, test-controller, and DFT-related functionality

• Execute regressions and debug simulation failures

• Drive functional and code coverage closure

• Develop automation using Python, Perl, or TCL

• Collaborate with RTL, DFT, architecture, and verification teams

• Support verification sign-off and tape-out readiness

Key Skills

SoC Verification | IP Verification | SystemVerilog | UVM | PCIe | DDR | MBIST | Test Controller | DFT Architecture | Functional Verification | Coverage Closure | Python | Perl | TCL | AI-Assisted Verification