All fields marked * are required
DFT Engineer – MBIST & SCAN
Location: Bengaluru
Experience: 3+ Years
Employment Type: Full-Time
Work Mode: Onsite / Work From Office
Salary Range: ₹10–16 LPA
We are looking for a DFT Engineer with 3+ years of hands-on experience in Design-for-Test (DFT), with strong expertise in MBIST and SCAN implementation and/or verification.
· Develop, implement and verify DFT features at RTL and/or gate level.
· Work on MBIST architecture, insertion, configuration and verification.
· Work on SCAN architecture, scan insertion and scan-related verification.
· Analyze DFT coverage, test patterns and test-related issues.
· Debug DFT implementation and simulation failures.
· Collaborate with RTL, Physical Design, Verification and STA teams.
· Support DFT sign-off activities and resolve DFT-related issues.
· 3+ years of relevant DFT experience
· Hands-on experience in MBIST – Mandatory
· Hands-on experience in SCAN / Scan DFT – Mandatory
· Strong understanding of DFT concepts and test methodologies.
· Experience in DFT implementation, verification or debug.
· Candidates must have direct hands-on DFT experience; purely functional verification profiles are not suitable.
· Experience with DFT tools and ATPG flows.
· Knowledge of ATPG, scan compression, EDT or related DFT technologies.
· Experience with semiconductor/SoC/ASIC design environments.
Bengaluru
Required
Preferred
All fields marked * are required
DFT Engineer – MBIST & SCAN
Location: Bengaluru
Experience: 3+ Years
Employment Type: Full-Time
Work Mode: Onsite / Work From Office
Salary Range: ₹10–16 LPA
We are looking for a DFT Engineer with 3+ years of hands-on experience in Design-for-Test (DFT), with strong expertise in MBIST and SCAN implementation and/or verification.
· Develop, implement and verify DFT features at RTL and/or gate level.
· Work on MBIST architecture, insertion, configuration and verification.
· Work on SCAN architecture, scan insertion and scan-related verification.
· Analyze DFT coverage, test patterns and test-related issues.
· Debug DFT implementation and simulation failures.
· Collaborate with RTL, Physical Design, Verification and STA teams.
· Support DFT sign-off activities and resolve DFT-related issues.
· 3+ years of relevant DFT experience
· Hands-on experience in MBIST – Mandatory
· Hands-on experience in SCAN / Scan DFT – Mandatory
· Strong understanding of DFT concepts and test methodologies.
· Experience in DFT implementation, verification or debug.
· Candidates must have direct hands-on DFT experience; purely functional verification profiles are not suitable.
· Experience with DFT tools and ATPG flows.
· Knowledge of ATPG, scan compression, EDT or related DFT technologies.
· Experience with semiconductor/SoC/ASIC design environments.
Bengaluru
Required
Preferred